HD6473032F16 Datasheet, PDF (213/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 7 Refresh Controller
Bus-released state Refresh cycle CPU cycle Refresh cycle
φ
RFSH
Refresh
request
BACK
Figure 7.24 Refresh Cycles when Bus Is Released
If a bus cycle is prolonged by insertion of wait states, the first refresh request is held, as in the bus-
released state.
If there is contention with a bus request from an external bus master when making a transition to
software standby mode, a one-state bus-released state may occur immediately before the transition
to software standby mode (see figure 7.25).
When using software standby mode, clear the BRLE bit to 0 in BRCR before executing the
SLEEP instruction.
When making a transition to self-refresh mode, the strobe waveform output may not be guaranteed
due to the same kind of contention. This, too, can be prevented by clearing the BRLE bit to 0 in
BRCR.
Rev. 3.00 Mar 21, 2006 page 183 of 814
REJ09B0302-0300