HD6473032F16 Datasheet, PDF (120/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 5 Interrupt Controller
5.2.4 IRQ Enable Register (IER)
IER is an 8-bit readable/writable register that enables or disables IRQ₀ to IRQ₅ interrupt requests.
Bit
Initial value
Read/Write
7
—
0
R/W
6
—
0
R/W
5
IRQ5E
0
R/W
4
IRQ4E
0
R/W
3
IRQ3E
0
R/W
2
IRQ2E
0
R/W
1
IRQ1E
0
R/W
0
IRQ0E
0
R/W
Reserved bits
IRQ ₅ to IRQ₀ enable
These bits enable or disable IRQ ₅ to IRQ₀ interrupts
IER is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 and 6—Reserved: These bits can be written and read, but they do not enable or disable
interrupts.
Bits 5 to 0—IRQ₅ to IRQ₀ Enable (IRQ5E to IRQ0E): These bits enable or disable
IRQ₅ to IRQ0 interrupts.
Bits 5 to 0:
IRQ5E to IRQ0E
0
1
Description
IRQ5 to IRQ0 interrupts are disabled
IRQ5 to IRQ0 interrupts are enabled
(Initial value)
Rev. 3.00 Mar 21, 2006 page 90 of 814
REJ09B0302-0300