SH7147 Datasheet, PDF (963/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 23 Advanced User Debugger (AUD)
Command CMD1 CMD1E CMD2
WDWM B'1001 (pt) (bt) (sa) (sd)
WDRM B'1101 (pt) (bt) (sa) (sd)
Description
Outputs write access data in window data trace
Following this command, the write address and write
data address in the data part are output in that order.
pt: 1-bit identifier for the processor core that obtained
data. Fixed to 1 in this LSI.
bt: 3-bit identifier for the bus that obtained data.
bt = B'000: L bus trace
bt = B'100: I bus trace
bt = B'001 to B'011: Reserved
bt = B'101 to B'111: Reserved
sa: Write address size
sa = B'00: Lower 4 bits of address
sa = B'01: Lower 8 bits of address
sa = B'10: Lower 16 bits of address
sa = B'11: 32 bits full address
sd: Write data size
sd = B'01: Byte-size data (8 bits)
sd = B'10: Word-size data (16 bits)
sd = B'11: Longword-size data (32 bits)
Outputs read access data for window data trace
Following this command, the read address and read
data address in the data part are output in that order.
pt: Identifier for the processor core that obtained
data. Same as pt in WDWM.
bt: Identifier for the bus that obtained data. Same as
bt in WDWM.
sa: Read address size. Same as sa in WDWM.
sd: Read data size. Same as sd in WDWM.
Rev. 3.00 Oct. 06, 2008 Page 939 of 1080
REJ09B0230-0300