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SH7147 Datasheet, PDF (778/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family
Section 18 Pin Function Controller (PFC)
• Port A Control Register L1 (PACRL1)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PA3 PA3 PA3
MD2 MD1 MD0
-
PA2 PA2 PA2
MD2 MD1 MD0
-
PA1 PA1 PA1
MD2 MD1 MD0
-
PA0 PA0 PA0
MD2 MD1 MD0
Initial value: 0 0*1 0
0
0 0*1 0
0
0 0*1 0
0
0 0* 0
0
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Note: 1. The initial value is 1 in the on-chip ROM disabled external-extension mode.
Initial
Bit
Bit Name Value R/W Description
15
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
14
PA3MD2 0*1
R/W PA3 Mode
13
PA3MD1 0
R/W Select the function of the PA3/A3/IRQ1/RXD1 pin.
12
PA3MD0 0
R/W 000: PA3 I/O (port)
001: RXD1 input (SCI)
100: A3 output (BSC)*2
111: IRQ1 input (INTC)
Other than above: Setting prohibited
11
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
10
PA2MD2 0*1
R/W PA2 Mode
9
PA2MD1 0
R/W Select the function of the PA2/A2/IRQ0/POE2/SCK0
8
PA2MD0 0
R/W pin.
000: PA2 I/O (port)
001: SCK0 I/O (SCI)
011: IRQ0 input (INTC)
100: A2 output (BSC)*2
111: POE2 input (POE)
Other than above: Setting prohibited
7
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 3.00 Oct. 06, 2008 Page 754 of 1080
REJ09B0230-0300