SH7147 Datasheet, PDF (109/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 5 Exception Handling
5.4 Interrupts
5.4.1 Interrupt Sources
Table 5.7 shows the sources that start the interrupt exception handling. They are NMI, user break,
IRQ, and on-chip peripheral modules.
Table 5.7 Interrupt Sources
Type
Request Source
NMI
NMI pin (external input)
User break
User break controller (UBC)
IRQ
IRQ0 to IRQ3 pins (external input)
On-chip peripheral module
Multi-function timer pulse unit 2 (MTU2)
Multi-function timer pulse unit 2S (MTU2S)
Data transfer controller (DTC)
Watchdog timer (WDT)
A/D converter (A/D_0 and A/D_1)
Compare match timer (CMT_0 and CMT_1)
Serial communication interface (SCI_0, SCI_1,
and SCI_2)
Synchronous serial communication unit
Port output enable (POE)
Controller area network (RCAN-ET)
Note: * Available only in the SH7142.
Number of
Sources
1
1
4
25
13
1
1
2
2
12
3
3
5/10*
All interrupt sources are given different vector numbers and vector table address offsets. For
details on vector numbers and vector table address offsets, see table 6.3.
Rev. 3.00 Oct. 06, 2008 Page 85 of 1080
REJ09B0230-0300