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SH7147 Datasheet, PDF (201/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family | |||
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Section 8 Data Transfer Controller (DTC)
1st Transfer
2nd Transfer
Transfer
Transfer
Transfer
Mode
CHNE CHNS RCHNE DISEL Counter*1 CHNE CHNS RCHNE DISEL Counter*1 DTC Transfer
Repeat 0
â¯
â¯
0
â¯
â¯
â¯
â¯
â¯
â¯
Ends at 1st
transfer
0
â¯
â¯
1
â¯
â¯
â¯
â¯
â¯
â¯
Ends at 1st
transfer
Interrupt request
to CPU
1
0
â¯
â¯
â¯
0
â¯
â¯
0
â¯
Ends at 2nd
transfer
0
â¯
â¯
1
â¯
Ends at 2nd
transfer
Interrupt request
to CPU
1
1
â¯
0
Not 0
â¯
â¯
â¯
â¯
â¯
Ends at 1st
transfer
1
1
â¯
1
Not 0
â¯
â¯
â¯
â¯
â¯
Ends at 1st
transfer
Interrupt request
to CPU
1
1
0
0
0*2
â¯
â¯
â¯
â¯
â¯
Ends at 1st
transfer
1
1
0
1
0*2
â¯
â¯
â¯
â¯
â¯
Ends at 1st
transfer
Interrupt request
to CPU
1
1
1
â¯
0*2
0
â¯
â¯
0
â¯
Ends at 2nd
transfer
0
â¯
â¯
1
â¯
Ends at 2nd
transfer
Interrupt request
to CPU
Rev. 3.00 Oct. 06, 2008 Page 177 of 1080
REJ09B0230-0300
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