SH7147 Datasheet, PDF (947/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 22 Power-Down Modes
22.8 Hardware Standby Mode
22.8.1 Transition to Hardware Standby Mode
When the HSTBY pin is driven low, a transition is made to hardware standby mode.
In hardware standby mode, not only the CPU but also clocks and peripheral modules stop
operation, and internal power supply of this LSI is lost. Contents of CPU registers and data in the
on-chip RAM become undefined. On-chip peripheral module registers are initialized. Transition to
hardware standby mode is performed asynchronously regardless of the current state of this LSI
since the transition is made by the external pin input. For pin states in hardware standby mode, see
appendix A, Pin States. Do not change the state of the mode pins (MD1 and MD0) while the CPU
is in hardware standby mode.
22.8.2 Clearing Hardware Standby Mode
Hardware standby mode is cleared by means of the HSTBY pin and the RES pin. When the
HSTBY pin is driven high while the RES pin is low, the clock oscillation is started. Ensure that
the RES pin is held low until the clock oscillation stabilizes. When the RES pin is then driven
high, a transition is made to the program execution state via the power-on reset exception handling
state.
22.8.3 Hardware Standby Mode Timing
Figure 22.1 shows a transition-timing example to hardware standby mode.
In this example, the HSTBY pin is driven low, then the transition to hardware standby mode is
made. Hardware standby mode is cleared when the HSTBY pin is driven high and then the RES
pin is driven high after the elapse of the oscillation stabilization time of the clock pulse.
Rev. 3.00 Oct. 06, 2008 Page 923 of 1080
REJ09B0230-0300