SH7147 Datasheet, PDF (841/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 20 Flash Memory
(6) Flash Transfer Destination Address Register (FTDAR)
FTDAR specifies the on-chip RAM address to which the on-chip program is downloaded.
Make settings for FTDAR before writing 1 to the SCO bit in FCCS. The initial value is H'00
which points to the start address (H'FFFF9000) in on-chip RAM.
Bit: 7
6
TDER
Initial value: 0
0
R/W: R/W R/W
5
0
R/W
4
3
2
TDA[6:0]
0
0
0
R/W R/W R/W
1
0
R/W
0
0
R/W
Initial
Bit
Bit Name Value
7
TDER
0
6 to 0 TDA[6:0] All 0
R/W Description
R/W Transfer Destination Address Setting Error
This bit is set to 1 when there is an error in the
download start address set by bits 6 to 0 (TDA6 to
TDA0). Whether the address setting is erroneous or not
is tested by checking whether the setting of TDA6 to
TDA0 is in the range of H'00 to H'04 after setting the
SCO bit in FCCS to 1 and performing download. Before
setting the SCO bit to 1 be sure to set the FTDAR value
between H'00 to H'04 as well as clearing this bit to 0.
0: Setting of TDA6 to TDA0 is normal
1: Setting of TDER and TDA6 to TDA0 is H'05 to H'FF
and download has been aborted
R/W Transfer Destination Address
These bits specify the download start address. A value
from H'00 to H'04 can be set to specify the download
start address in on-chip RAM in 2-Kbyte units.
A value from H'05 to H'7F cannot be set. If such a value
is set, the TDER bit (bit 7) in this register is set to 1 to
prevent download from being executed.
H'00: Download start address is set to H'FFFF9000
H'01: Download start address is set to H'FFFF9800
H'02: Download start address is set to H'FFFFA000
H'03: Download start address is set to H'FFFFA800
H'04: Download start address is set to H'FFFFB000
H'05 to H'7F: Setting prohibited. If this value is set, the
TDER bit (bit 7) is set to 1 to abort the
download processing.
Rev. 3.00 Oct. 06, 2008 Page 817 of 1080
REJ09B0230-0300