SH7147 Datasheet, PDF (572/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 13 Serial Communication Interface (SCI)
Table 13.3 SCSMR Settings
SCSMR Settings
n
Clock Source
CKS1
CKS0
0
Pφ
0
0
1
Pφ/4
0
1
2
Pφ/16
1
0
3
Pφ/64
1
1
Note: The bit rate error in asynchronous is given by the following formula:
Error (%) =
Pφ × 10⁶
-1
(N + 1) × B × 64 × 2^2n-1
× 100
Tables 13.4 to 13.6 show examples of SCBRR settings in asynchronous mode, and tables 13.7 to
13.9 show examples of SCBRR settings in clock synchronous mode.
Rev. 3.00 Oct. 06, 2008 Page 548 of 1080
REJ09B0230-0300