SH7147 Datasheet, PDF (115/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Types
Illegal slot instruction
General illegal instruction
Stack State
Section 5 Exception Handling
SP →
Address of
delayed branch instruction
SR
32 bits
32 bits
SP →
Address of
general illegal instruction
SR
32 bits
32 bits
Rev. 3.00 Oct. 06, 2008 Page 91 of 1080
REJ09B0230-0300