SH7147 Datasheet, PDF (830/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 20 Flash Memory
(1) Selection of On-Chip Program to be Downloaded and Setting of Download Destination
This LSI has programming/erasing programs and they can be downloaded to the on-chip RAM.
The on-chip program to be downloaded is selected by setting the corresponding bits in the
programming/erasing interface registers. The download destination can be specified by FTDAR.
(2) Download of On-Chip Program
The on-chip program is automatically downloaded by clearing VBR of the CPU to H'84000000
and then setting the SCO bit in the flash code control and status register (FCCS) and the flash key
code register (FKEY), which are programming/erasing interface registers.
The user MAT is replaced to the embedded program storage area when downloading. Since the
flash memory cannot be read when programming/erasing, the procedure program, which is
working from download to completion of programming/erasing, must be executed in a space other
than the flash memory to be programmed/erased (for example, on-chip RAM).
Since the result of download is returned to the programming/erasing interface parameters, whether
the normal download is executed or not can be confirmed.
Note that VBR can be changed after download is completed.
(3) Initialization of Programming/Erasing
The operating frequency and user branch are set before execution of programming/erasing. The
user branch destination must be in an area other than the user MAT area which is in the middle of
programming and the area where the on-chip program is downloaded. These settings are
performed by using the programming/erasing interface parameters.
Rev. 3.00 Oct. 06, 2008 Page 806 of 1080
REJ09B0230-0300