SH7147 Datasheet, PDF (831/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 20 Flash Memory
(4) Programming/Erasing Execution
To program or erase, the FWE pin must be brought high and user program mode must be entered.
The program data/programming destination address is specified in 128-byte units when
programming.
The block to be erased is specified in erase-block units when erasing.
These specifications are set by using the programming/erasing interface parameters and the on-
chip program is initiated. The on-chip program is executed by using the JSR or BSR instruction to
perform the subroutine call of the specified address in the on-chip RAM. The execution result is
returned to the programming/erasing interface parameters.
The area to be programmed must be erased in advance when programming flash memory.
There are limitations and notes on the interrupt processing during programming/erasing. For
details, see section 20.8.2, Interrupts during Programming/Erasing.
(5) When Programming/Erasing is Executed Consecutively
When the processing is not ended by the 128-byte programming or one-block erasure, the program
address/data and erase-block number must be updated and consecutive programming/erasing is
required.
Since the downloaded on-chip program is left in the on-chip RAM after the processing, download
and initialization are not required when the same processing is executed consecutively.
Rev. 3.00 Oct. 06, 2008 Page 807 of 1080
REJ09B0230-0300