SH7147 Datasheet, PDF(198/1108 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

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SH7147 Datasheet, PDF (198/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

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Section 8 Data Transfer Controller (DTC)

8.5 Operation

There are three transfer modes: normal, repeat, and block. Since transfer information is in the data

area, it is possible to transfer data over any required number of channels. When activated, the DTC

reads the transfer information stored in the data area and transfers data according to the transfer

information. After the data transfer is complete, it writes updated transfer information back to the

data area.

The DTC specifies the source address and destination address in SAR and DAR, respectively.

After a transfer, SAR and DAR are incremented, decremented, or fixed independently.

Table 8.3 shows the DTC transfer modes.

Table 8.3 DTC Transfer Modes

Transfer Size of Data Transferred at One Memory Address Increment or

Mode Transfer Request

Decrement

Transfer

Count

Normal 1 byte/word/longword

Incremented/decremented by 1, 2, or 1 to 65536

4, or fixed

Repeat*1 1 byte/word/longword

Incremented/decremented by 1, 2, or 1 to 256*3

4, or fixed

Block*2 Block size specified by CRAH Incremented/decremented by 1, 2, or 1 to 65536*4

(1 to 256 bytes/words/longwords) 4, or fixed

Notes: 1. Either source or destination is specified to repeat area.

2. Either source or destination is specified to block area.

3. After transfer of the specified transfer count, initial state is recovered to continue the

operation.

4. Number of transfers of the specified block size of data

Setting the CHNE bit in MRB to 1 makes it possible to perform a number of transfers with a

single activation (chain transfer). Setting the CHNS bit in MRB to 1 can also be made to have

chain transfer performed only when the transfer counter value is 0.

Figure 8.4 shows a flowchart of DTC operation, and table 8.4 summarizes the conditions for DTC

transfers including chain transfer (combinations for performing the second and third transfers are

omitted).

Rev. 3.00 Oct. 06, 2008 Page 174 of 1080

REJ09B0230-0300

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