SH7147 Datasheet, PDF (419/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2) and Multi-Function Timer Pulse Unit 2S (MTU2S)
TGRA_3
TCDR
MTU2-MTU2S
synchronous clearing
Bit WRE = 1
Bit SCC = 1
TGRB_3
Counters
are not cleared
TCNT_3
(MTU2S)
TCNT_4
(MTU2S)
TDDR
H'0000
Positive phase
Negative phase
Output waveform is active-low.
Figure 10.65 Example of Synchronous Clearing in Dead Time during Up-Counting
(Timing (3) in Figure 10.57; Bit WRE is 1 and Bit SCC is 1 in TWCR of MTU2S)
Rev. 3.00 Oct. 06, 2008 Page 395 of 1080
REJ09B0230-0300