SH7147 Datasheet, PDF (199/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Start
Match &
RRS = 1
Vector number
comparison
Not match | RRS = 0
Read DTC vector
Next transfer
Read transfer
information
Transfer data
Update transfer
information
Write transfer information
Section 8 Data Transfer Controller (DTC)
Update the start address
of transfer information
CHNE = 1
Yes
No
Transfer counter = 0
or DISEL = 1 _Yes
No
Clear activation
source flag
CHNS = 0
Yes
No
Transfer counter = 0
Yes
No
DISEL = 1
Yes
No
Clear DTCER/request an interrupt
to the CPU
End
Figure 8.4 Flowchart of DTC Operation
Rev. 3.00 Oct. 06, 2008 Page 175 of 1080
REJ09B0230-0300