SH7147 Datasheet, PDF (1057/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 25 Electrical Characteristics
Item
Symbol Min.
Max.
Unit Reference Figure
Write data hold time 1
t_WDH1
1
—
ns
Figures 25.11 to
25.15
Write data hold time
t
0
WRH
—
ns
Figures 25.11 to
25.14
WAIT setup time
t
1/2t + 20 —
WTS
Bcyc
ns
Figures 25.12 to
25.15
WAIT hold time
t_WTH
1/2t_Bcyc + 20 —
ns
Figures 25.12 to
25.15
Notes: t_Bcyc indicates external bus clock period (Bφ = CK).
1. n denotes the number of wait cycles.
2. If the access time conditions are satisfied, the t_RDS1 condition does not need to be
satisfied.
CK
A19 to A0
CSn
RD
Read
D7 to D0
Write
WRL
D7 to D0
T1
T2
t_AD1
t_CSD
t_AS
t_CSS
t_AD1
t_CSD
t_RSD
t_ACC
t_OE
t_RSD
t_CSH
t_AH
t_RDS1
t_RDH1
t_WSD1
t_WDD1
t_WSD1
t_CSH
t_AH
t_WRH
t_WDH1
Figure 25.11 Basic Bus Timing for Normal Space (No Wait)
Rev. 3.00 Oct. 06, 2008 Page 1033 of 1080
REJ09B0230-0300