SH7147 Datasheet, PDF (15/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

11.3.6 Software Port Output Enable Register (SPOER) .............................................. 505
11.3.7 Port Output Enable Control Register 1 (POECR1) ........................................... 506
11.3.8 Port Output Enable Control Register 2 (POECR2) ........................................... 508
11.4 Operation .......................................................................................................................... 511
11.4.1 Input Level Detection Operation....................................................................... 512
11.4.2 Output-Level Compare Operation .................................................................... 513
11.4.3 Release from High-Impedance State................................................................. 514
11.5 Interrupts........................................................................................................................... 515
11.6 Usage Note........................................................................................................................ 515
11.6.1 Pin State when a Power-On Reset Is Issued from the Watchdog Timer ........... 515
Section 12 Watchdog Timer (WDT)..................................................................517
12.1 Features............................................................................................................................. 517
12.2 Input/Output Pin for WDT................................................................................................ 519
12.3 Register Descriptions ........................................................................................................ 520
12.3.1 Watchdog Timer Counter (WTCNT)................................................................ 520
12.3.2 Watchdog Timer Control/Status Register (WTCSR) ........................................ 521
12.3.3 Notes on Register Access.................................................................................. 523
12.4 Operation .......................................................................................................................... 524
12.4.1 Revoking Software Standbys ............................................................................ 524
12.4.2 Using Watchdog Timer Mode........................................................................... 524
12.4.3 Using Interval Timer Mode............................................................................... 525
12.5 Usage Note........................................................................................................................ 526
12.5.1 WTCNT Setting Value ..................................................................................... 526
Section 13 Serial Communication Interface (SCI) ............................................527
13.1 Features............................................................................................................................. 527
13.2 Input/Output Pins.............................................................................................................. 529
13.3 Register Descriptions ........................................................................................................ 530
13.3.1 Receive Shift Register (SCRSR)....................................................................... 531
13.3.2 Receive Data Register (SCRDR) ...................................................................... 531
13.3.3 Transmit Shift Register (SCTSR) ..................................................................... 531
13.3.4 Transmit Data Register (SCTDR)..................................................................... 532
13.3.5 Serial Mode Register (SCSMR)........................................................................ 532
13.3.6 Serial Control Register (SCSCR)...................................................................... 535
13.3.7 Serial Status Register (SCSSR)......................................................................... 538
13.3.8 Serial Port Register (SCSPTR) ......................................................................... 544
13.3.9 Serial Direction Control Register (SCSDCR) ................................................... 546
13.3.10 Bit Rate Register (SCBRR)............................................................................... 547
Rev. 3.00 Oct. 06, 2008 Page xv of xxiv
REJ09B0230-0300