SH7147 Datasheet, PDF (1097/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Index
Index
A
A/D conversion time............................... 653
A/D converter (ADC) ............................. 635
A/D converter activation......................... 426
A/D converter activation by MTU2
and MTU2S ............................................ 654
A/D converter characteristics................ 1057
A/D converter start request delaying
function................................................... 409
Absolute accuracy................................... 658
Absolute maximum ratings................... 1019
AC bus timing....................................... 1032
AC characteristics................................. 1025
AC characteristics measurement
conditions.............................................. 1056
Access in view of LSI internal bus
master ..................................................... 230
Access size and data alignment .............. 215
Access wait control................................. 219
Address calculation during branch
trace ........................................................ 942
Address error .............................. 83, 92, 906
Address map ........................................... 202
Addressing modes..................................... 26
Advanced user debugger (AUD) ............ 925
Arithmetic operation instructions ............. 39
Asynchronous mode ....................... 527, 560
B
Block transfer mode................................ 183
Boot mode............................................... 835
Branch instructions ................................... 43
Branch trace............................................ 940
Branch trace mode .................................. 925
Break comparison conditions.................. 121
Break detection and processing .............. 589
Break on data access cycle...................... 146
Bus arbitration......................................... 224
Bus clock (Bφ) .......................................... 57
Bus release state ........................................ 47
Bus state controller (BSC) ...................... 199
C
Calculating exception handling vector table
addresses ................................................... 80
CAN interface ......................................... 677
Chain transfer.......................................... 184
Changing frequency .................................. 70
Clock (MIφ) for the MTU2S module ........ 57
Clock (MPφ) for the MTU2 module ......... 57
Clock frequency control circuit................. 59
Clock operating mode ............................... 62
Clock pulse generator (CPG) .................... 57
Clock synchronous mode ................ 527, 570
Clock timing ......................................... 1026
CMT interrupt sources ............................ 669
Compare match timer (CMT) ................. 663
Complementary PWM mode .................. 365
Conflict between NMI Interrupt and
DTC Activation....................................... 197
Connecting crystal resonator..................... 71
Continuous scan mode ............................ 650
Control signal timing ............................ 1029
Controller area network (RCAN-ET)...... 673
CPU........................................................... 17
Crystal oscillator ....................................... 59
CSn assert period extension .................... 221
D
Data transfer controller (DTC)................ 157
Data transfer instructions .......................... 37
Rev. 3.00 Oct. 06, 2008 Page 1073 of 1080
REJ09B0230-0300