SH7147 Datasheet, PDF (783/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 18 Pin Function Controller (PFC)
• Port B Control Register L1 (PBCRL1)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PB3 PB3 PB3
MD2 MD1 MD0
-
PB2 PB2 PB2
MD2 MD1 MD0
-
PB1 PB1 PB1
MD2 MD1 MD0
-
PB0 PB0 PB0
MD2 MD1 MD0
Initial value: 0 0*¹ 0 0*¹ 0 0*¹ 0 0*¹ 0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Note: 1. The initial value is 1 in the on-chip ROM disabled external-extension mode.
Initial
Bit
Bit Name Value R/W Description
15
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
14
PB3MD2 0*¹
R/W PB3 Mode
13
PB3MD1 0
R/W Select the function of the PB3/A17/IRQ1/POE1 pin.
12
PB3MD0 0*¹
R/W 000: PB3 I/O (port)
001: IRQ1 input (INTC)
010: POE1 input (POE)
101: A17 output (BSC)*³
Other than above: Setting prohibited
11
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
10
PB2MD2 0*¹
R/W PB2 Mode
9
PB2MD1 0
R/W Select the function of the
8
PB2MD0 0*¹
R/W ^{PB2/A16/IRQ0/POE0/TIC5VS pin.}
000: PB2 I/O (port)
001: IRQ0 input (INTC)
010: POE0 input (POE)
011: TIC5VS input (MTU2S)
101: A16 output (BSC)*³
Other than above: Setting prohibited
7
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 3.00 Oct. 06, 2008 Page 759 of 1080
REJ09B0230-0300