SH7147 Datasheet, PDF (453/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2) and Multi-Function Timer Pulse Unit 2S (MTU2S)
MPφ
External
clock
TCNT input
clock
Rising edge
Falling edge
TCNT
N-1
N
N-1
Figure 10.97 Count Timing in External Clock Operation (Phase Counting Mode)
Output Compare Output Timing: A compare match signal is generated in the final state in
which TCNT and TGR match (the point at which the count value matched by TCNT is updated).
When a compare match signal is generated, the output value set in TIOR is output at the output
compare output pin (TIOC pin). After a match between TCNT and TGR, the compare match
signal is not generated until the TCNT input clock is generated.
Figure 10.98 shows output compare output timing (normal mode and PWM mode) and figure
10.99 shows output compare output timing (complementary PWM mode and reset synchronous
PWM mode).
MPφ
TCNT input
clock
TCNT
N
N+1
TGR
N
Compare
match signal
TIOC pin
Figure 10.98 Output Compare Output Timing (Normal Mode/PWM Mode)
Rev. 3.00 Oct. 06, 2008 Page 429 of 1080
REJ09B0230-0300