SH7147 Datasheet, PDF (845/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 20 Flash Memory
Initial
Bit
Bit Name Value
R/W Description
1
FK
Undefined R/W Flash Key Register Error Detect
Returns the check result whether the value of FKEY is
set to H'A5.
0: FKEY setting is normal (FKEY = H'A5)
1: FKEY setting is abnormal (FKEY = value other than
H'A5)
0
SF
Undefined R/W Success/Fail
Returns the result whether download has ended
normally or not.
0: Downloading on-chip program has ended normally
(no error)
1: Downloading on-chip program has ended abnormally
(error occurs)
(2) Programming/Erasing Initialization
The on-chip programming/erasing program to be downloaded includes the initialization program.
The specified period pulse must be applied when programming or erasing. The specified pulse
width is made by the method in which wait loop is configured by the CPU instruction. The
operating frequency of the CPU must be set. Since the user branch function is supported, the user
branch destination address must be set.
The initial program is set as a parameter of the programming/erasing program which has
downloaded these settings.
• Flash programming/erasing frequency parameter (FPEFEQ: general register R4 of CPU)
This parameter sets the operating frequency of the CPU.
For the range of the operating frequency of this LSI, see section 25.3.1, Clock Timing.
Bit: 31
-
Initial value: -
R/W: R/W
30
-
-
R/W
29
-
-
R/W
28
-
-
R/W
27
-
-
R/W
26
-
-
R/W
25
-
-
R/W
24
-
-
R/W
23
-
-
R/W
22
-
-
R/W
21
-
-
R/W
20
-
-
R/W
19
-
-
R/W
18
-
-
R/W
17
-
-
R/W
16
-
-
R/W
Bit: 15
F15
Initial value: -
R/W: R/W
14
F14
-
R/W
13
F13
-
R/W
12
F12
-
R/W
11
F11
-
R/W
10
F10
-
R/W
9
F9
-
R/W
8
F8
-
R/W
7
F7
-
R/W
6
F6
-
R/W
5
F5
-
R/W
4
F4
-
R/W
3
F3
-
R/W
2
F2
-
R/W
1
F1
-
R/W
0
F0
-
R/W
Rev. 3.00 Oct. 06, 2008 Page 821 of 1080
REJ09B0230-0300