SH7147 Datasheet, PDF (39/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 1 Overview
Classification
Symbol
I/O Name
Function
Advanced user
debugger
(AUD)
AUDATA3 to I/O AUD data
AUDATA0
Branch trace mode:
Branch source/destination address
output pins
AUDRST
I
AUD reset
RAM monitor mode:
Monitor address input, or data I/O
pins
Reset signal input pin
AUDMD
I AUD mode
Mode select signal input pin
Branch trace mode (L)
RAM monitor mode (H)
AUDCK
I/O AUD clock
Branch trace mode:
Sync-clock output pin
AUDSYNC
RAM monitor mode:
Sync-clock input pin
I/O AUD sync signal Branch trace mode:
Data start-position acknowledge-
signal output pin
RAM monitor mode:
Data start-position acknowledge-
signal input pin
Note: * Available only in the SH7142.
Rev. 3.00 Oct. 06, 2008 Page 15 of 1080
REJ09B0230-0300