SH7147 Datasheet, PDF (84/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 4 Clock Pulse Generator (CPG)
Table 4.1 shows the operating clock for each module.
Table 4.1 Operating Clock for Each Module
Operating Clock
Internal clock (Iφ)
Bus clock (Bφ)
Operating Module
CPU
UBC
ROM
RAM
AUD
BSC
DTC
Operating Clock
Peripheral clock (Pφ)
MTU2 clock (MPφ)
MTU2S clock (MIφ)
Operating Module
POE
SCI
Synchronous serial
communication unit
A/D
CMT
RCAN-ET
WDT
MTU2
MTU2S
Rev. 3.00 Oct. 06, 2008 Page 60 of 1080
REJ09B0230-0300