SH7147 Datasheet, PDF (87/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 4 Clock Pulse Generator (CPG)
Table 4.4 Frequency Division Ratios Specifiable with FRQCR
PLL
Multipli-
FRQCR Division Ratio
Setting
cation
Ratio Iφ Bφ Pφ MIφ MPφ Iφ
Clock Ratio
Clock Frequency (MHz)*
Input
Bφ Pφ MIφ MPφ Clock Iφ
Bφ Pφ MIφ MPφ
×8
1/4 1/4 1/8 1/8 1/8 2 2 1 1 1 10
20 20 10 10 10
1/4 1/4 1/8 1/4 1/8 2 2 1 2 1
20 20 10 20 10
1/4 1/4 1/8 1/4 1/4 2 2 1 2 2
20 20 10 20 20
1/4 1/4 1/4 1/4 1/4 2 2 2 2 2
20 20 20 20 20
1/3 1/3 1/3 1/3 1/3 8/3 8/3 8/3 8/3 8/3
26 26 26 26 26
1/2 1/4 1/8 1/8 1/8 4 2 1 1 1
40 20 10 10 10
1/2 1/4 1/8 1/4 1/8 4 2 1 2 1
40 20 10 20 10
1/2 1/4 1/8 1/4 1/4 4 2 1 2 2
40 20 10 20 20
1/2 1/4 1/8 1/2 1/8 4 2 1 4 1
40 20 10 40 10
1/2 1/4 1/8 1/2 1/4 4 2 1 4 2
40 20 10 40 20
1/2 1/4 1/4 1/4 1/4 4 2 2 2 2
40 20 20 20 20
1/2 1/4 1/4 1/2 1/4 4 2 2 4 2
40 20 20 40 20
1/2 1/2 1/8 1/8 1/8 4 4 1 1 1
40 40 10 10 10
1/2 1/2 1/8 1/4 1/8 4 4 1 2 1
40 40 10 20 10
1/2 1/2 1/8 1/4 1/4 4 4 1 2 2
40 40 10 20 20
1/2 1/2 1/8 1/2 1/8 4 4 1 4 1
40 40 10 40 10
1/2 1/2 1/8 1/2 1/4 4 4 1 4 2
40 40 10 40 20
1/2 1/2 1/8 1/2 1/2 4 4 1 4 4
40 40 10 40 40
1/2 1/2 1/4 1/4 1/4 4 4 2 2 2
40 40 20 20 20
1/2 1/2 1/4 1/2 1/4 4 4 2 4 2
40 40 20 40 20
1/2 1/2 1/4 1/2 1/2 4 4 2 4 4
40 40 20 40 40
1/2 1/2 1/2 1/2 1/2 4 4 4 4 4
40 40 40 40 40
1/1 1/4 1/8 1/8 1/8 8 2 1 1 1
80 20 10 10 10
1/1 1/4 1/8 1/4 1/8 8 2 1 2 1
80 20 10 20 10
1/1 1/4 1/8 1/4 1/4 8 2 1 2 2
80 20 10 20 20
1/1 1/4 1/8 1/2 1/8 8 2 1 4 1
80 20 10 40 10
1/1 1/4 1/8 1/2 1/4 8 2 1 4 2
80 20 10 40 20
1/1 1/4 1/8 1/1 1/8 8 2 1 8 1
80 20 10 80 10
Rev. 3.00 Oct. 06, 2008 Page 63 of 1080
REJ09B0230-0300