SH7147 Datasheet, PDF (1098/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Index
DC characteristics................................. 1020
Dead time compensation ........................ 420
Deep software standby mode.................. 921
Definitions of A/D conversion
accuracy.................................................. 658
Divider...................................................... 59
DTC activation ....................................... 425
DTC activation by interrupt.................... 192
DTC activation sources .......................... 169
DTC bus release timing .......................... 189
DTC execution status.............................. 187
DTC interface ......................................... 731
DTC vector address ................................ 171
E
Error protection ...................................... 856
Exception handling ................................... 77
Exception handling state........................... 47
External clock input method ..................... 72
External pulse width measurement ......... 419
External trigger input timing .................. 655
F
Features of instructions............................. 23
Flash Memory......................................... 797
Flash memory characteristics ............... 1058
Flash memory configuration................... 803
Flash memory emulation in RAM .......... 858
Flow of the user break operation ............ 144
Full trace mode ....................................... 944
Full-scale error........................................ 658
Function for detecting oscillator stop ....... 73
G
General illegal instructions ....................... 88
General registers ....................................... 19
Rev. 3.00 Oct. 06, 2008 Page 1074 of 1080
REJ09B0230-0300
Global-base register (GBR) ...................... 20
H
Halt mode................................................ 719
Hardware protection................................ 855
I
I/O ports .................................................. 779
ID Reorder .............................................. 688
Illegal slot instructions.............................. 88
Immediate data formats............................. 23
Initial user branch processing time ......... 864
Initial values of control register ................ 21
Initial values of general register................ 21
Initial values of system register ................ 21
Initiation intervals of user branch
processing ............................................... 864
Input sampling and A/D conversion
time ......................................................... 652
Instruction formats .................................... 29
Instruction set............................................ 33
Interrupt controller (INTC) ....................... 95
Interrupt exception handling vector
able.......................................................... 109
Interrupt priority ....................................... 86
Interrupt response time ........................... 117
Interrupt sequence................................... 113
Interrupts................................................... 85
IRQ interrupts ......................................... 107
L
List of AUD bus commands ................... 938
List of registers ....................................... 953
Local acceptance filter mask (LAFM) .... 685
Location of transfer information and
DTC vector table..................................... 169