SH7147 Datasheet, PDF (16/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

13.4 Operation .......................................................................................................................... 558
13.4.1 Overview........................................................................................................... 558
13.4.2 Operation in Asynchronous Mode .................................................................... 560
13.4.3 Clock Synchronous Mode................................................................................. 570
13.4.4 Multiprocessor Communication Function ........................................................ 579
13.4.5 Multiprocessor Serial Data Transmission ......................................................... 581
13.4.6 Multiprocessor Serial Data Reception .............................................................. 582
13.5 SCI Interrupt Sources and DTC........................................................................................ 585
13.6 Serial Port Register (SCSPTR) and SCI Pins ................................................................... 586
13.7 Usage Notes ...................................................................................................................... 588
13.7.1 SCTDR Writing and TDRE Flag ...................................................................... 588
13.7.2 Multiple Receive Error Occurrence .................................................................. 588
13.7.3 Break Detection and Processing ....................................................................... 589
13.7.4 Sending a Break Signal..................................................................................... 589
13.7.5 Receive Data Sampling Timing and Receive Margin
(Asynchronous Mode) ...................................................................................... 589
13.7.6 Note on Using DTC .......................................................................................... 591
13.7.7 Note on Using External Clock in Clock Synchronous Mode............................ 591
13.7.8 Module Standby Mode Setting ......................................................................... 591
Section 14 Synchronous Serial Communication Unit ....................................... 593
14.1 Features............................................................................................................................. 593
14.2 Input/Output Pins.............................................................................................................. 595
14.3 Register Descriptions........................................................................................................ 596
14.3.1 SS Control Register H (SSCRH) ...................................................................... 597
14.3.2 SS Control Register L (SSCRL) ....................................................................... 599
14.3.3 SS Mode Register (SSMR) ............................................................................... 600
14.3.4 SS Enable Register (SSER) .............................................................................. 602
14.3.5 SS Status Register (SSSR) ................................................................................ 603
14.3.6 SS Control Register 2 (SSCR2) ........................................................................ 606
14.3.7 SS Transmit Data Registers 0 to 3 (SSTDR0 to SSTDR3)............................... 607
14.3.8 SS Receive Data Registers 0 to 3 (SSRDR0 to SSRDR3) ................................ 608
14.3.9 SS Shift Register (SSTRSR) ............................................................................. 609
14.4 Operation .......................................................................................................................... 610
14.4.1 Transfer Clock .................................................................................................. 610
14.4.2 Relationship of Clock Phase, Polarity, and Data .............................................. 610
14.4.3 Relationship between Data Input/Output Pins and Shift Register .................... 611
14.4.4 Communication Modes and Pin Functions ....................................................... 613
14.4.5 Synchronous Serial Communication Mode ...................................................... 615
14.4.6 SCS Pin Control and Conflict Error.................................................................. 624
Rev. 3.00 Oct. 06, 2008 Page xvi of xxiv
REJ09B0230-0300