SH7147 Datasheet, PDF (864/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 20 Flash Memory
(1) On-Chip RAM Address Map when Programming/Erasing is Executed
Parts of the procedure program that are made by the user, like download request,
programming/erasing procedure, and determination of the result, must be executed in the on-chip
RAM. All of the on-chip program that is to be downloaded is in on-chip RAM. Note that on-chip
RAM must be controlled so that these parts do not overlap.
Figure 20.10 shows the program area to be downloaded.
Area to be
downloaded
(Size: 3 kbytes)
Unusable area in
programming/erasing
processing period
<On-chip RAM>
Area that can be
used by user
Address
RAMTOP H'FFFF8000 (16 Kbytes)
H'FFFF9000 (12 Kbytes)
DPFR
(Return value: 1 byte)
System use area
(15 bytes)
Programming/
erasing entry
FTDAR setting
FTDAR setting+16
Initialization
process entry
FTDAR setting+32
Initialization +
programming program
or Initialization +
erasing program
Area that can be
used by user
FTDAR setting+3072
RAM emulation area ^H'FFFFA000
H'FFFFAFFF
Area that can be
used by user
RAMEND (H'FFFFBFFF)
Figure 20.10 RAM Map after Download
Rev. 3.00 Oct. 06, 2008 Page 840 of 1080
REJ09B0230-0300