SH7147 Datasheet, PDF (230/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Bus State Controller (BSC)
Table 9.5 (2) Address Map (512-Kbyte On-Chip ROM/16-Kbyte On-Chip RAM,
On-Chip ROM-Disabled Mode)
Address
Area
Memory Type
Capacity
Bus
Width
H'00000000 to CS0 space
H'03FFFFFF
Normal space
64 Mbytes 8 bits
H'04000000 to CS1 space
H'07FFFFFF
Normal space
64 Mbytes 8 bits
H'08000000 to Reserved
H'FFFF7FFF
H'FFFF8000 to On-chip RAM
H'FFFFBFFF
16 Kbytes 32 bits
H'FFFFC000 to On-chip peripheral
H'FFFFFFFF ^modules
16 Kbytes
8 or 16
bits
Note: Do not access the reserved area. If the reserved area is accessed, the correct operation
cannot be guaranteed.
Rev. 3.00 Oct. 06, 2008 Page 206 of 1080
REJ09B0230-0300