SH7147 Datasheet, PDF (958/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 23 Advanced User Debugger (AUD)
23.3.5 AUD Window B Start Address Register (AUWBSR)
AUWBSR is a 32-bit readable/writable register. AUWBSR designates the start address of window
B to be traced. The end address is designated by the AUD window B end address register
(AUWBER). Window B is defined as the area that satisfies AUWBSR ≤ window B ≤ AUWBER.
AUWBSR is initialized by a power-on reset, manual reset, AUDRST, AUD software reset, and
hardware standby mode.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
23.3.6 AUD Window B End Address Register (AUWBER)
AUWBER is a 32-bit readable/writable register. AUWBER designates the window B area together
with AUWBSR. AUWBER is initialized by a power-on reset, manual reset, AUDRST, AUD
software reset, and hardware standby mode.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Rev. 3.00 Oct. 06, 2008 Page 934 of 1080
REJ09B0230-0300