SH7147 Datasheet, PDF (276/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2) and Multi-Function Timer Pulse Unit 2S (MTU2S)
Table 10.6 MTU2S Register Configuration
Register Name
Abbrevia-
tion
R/W
Timer control register_3S
TCR_3S R/W
Timer control register_4S
TCR_4S R/W
Timer mode register_3S
TMDR_3S R/W
Timer mode register_4S
TMDR_4S R/W
Timer I/O control register H_3S TIORH_3S R/W
Timer I/O control register L_3S TIORL_3S R/W
Timer I/O control register H_4S TIORH_4S R/W
Timer I/O control register L_4S TIORL_4S R/W
Timer interrupt enable
register_3S
TIER_3S R/W
Timer interrupt enable
register_4S
TIER_4S R/W
Timer output master enable TOERS R/W
register S
Timer gate control register S TGCRS R/W
Timer output control register 1S TOCR1S R/W
Timer output control register 2S TOCR2S R/W
Timer counter_3S
TCNT_3S R/W
Timer counter_4S
TCNT_4S R/W
Timer cycle data register S
TCDRS R/W
Timer dead time data register S TDDRS R/W
Timer general register A_3S TGRA_3S R/W
Timer general register B_3S TGRB_3S R/W
Timer general register A_4S TGRA_4S R/W
Timer general register B_4S TGRB_4S R/W
Timer subcounter S
TCNTSS R
Timer cycle buffer register S TCBRS R/W
Timer general register C_3S TGRC_3S R/W
Timer general register D_3S TGRD_3S R/W
Initial Value Address
H'00
H'FFFFC600
H'00
H'FFFFC601
H'00
H'FFFFC602
H'00
H'FFFFC603
H'00
H'FFFFC604
H'00
H'FFFFC605
H'00
H'FFFFC606
H'00
H'FFFFC607
H'00
H'FFFFC608
H'00
H'FFFFC609
H'C0
H'FFFFC60A
H'80
H'00
H'00
H'0000
H'0000
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'0000
H'FFFF
H'FFFF
H'FFFF
H'FFFFC60D
H'FFFFC60E
H'FFFFC60F
H'FFFFC610
H'FFFFC612
H'FFFFC614
H'FFFFC616
H'FFFFC618
H'FFFFC61A
H'FFFFC61C
H'FFFFC61E
H'FFFFC620
H'FFFFC622
H'FFFFC624
H'FFFFC626
Access Size
8, 16, 32
8
8, 16
8
8, 16, 32
8
8, 16
8
8, 16
8
8
8
8, 16
8
16, 32
16
16, 32
16
16, 32
16
16, 32
16
16, 32
16
16, 32
16
Rev. 3.00 Oct. 06, 2008 Page 252 of 1080
REJ09B0230-0300