SH7147 Datasheet, PDF (1041/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 24 List of Registers
Register
Abbreviation
Power-on
reset
Software
Manual reset Standby
Deep Software Module
Standby
Standby
Sleep
BDMRB
Initialized
Retained
Retained
Initialized
Initialized Retained
BRCR
Initialized
Retained
Retained
Initialized
Initialized Retained
BRSR
Initialized
Initialized
Retained
Initialized
Initialized Retained
BRDR
Initialized
Initialized
Retained
Initialized
Initialized Retained
BETR
Initialized
Retained
Retained
Initialized
Initialized Retained
AUCSR
Initialized
Initialized
Retained
Initialized
Retained
Retained
AUWASR
Initialized
Initialized
Retained
Initialized
Retained
Retained
AUWAER
Initialized
Initialized
Retained
Initialized
Retained
Retained
AUWBSR
Initialized
Initialized
Retained
Initialized
Retained
Retained
AUWBER
Initialized
Initialized
Retained
Initialized
Retained
Retained
AUECSR
Initialized
Initialized
Retained
Initialized
Retained
Retained
Notes: 1. Available only in the SH7142.
2. Not initialized by a WDT power-on reset.
3. The OSCSTOP bit is not initialized by a WDT power-on reset.
4. The OSCSTOP bit is initialized.
Hardware
Standby
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Module
UBC
AUD
Rev. 3.00 Oct. 06, 2008 Page 1017 of 1080
REJ09B0230-0300