SH7147 Datasheet, PDF (832/1108 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 20 Flash Memory
20.3 Input/Output Pins
Flash memory is controlled by the pins as shown in table 20.3.
Table 20.3 Pin Configuration
Pin Name
Power-on reset
Flash programming
enable
Mode 1
Mode 0
Transmit data
Symbol
RES
FWE
MD1
MD0
TXD1 (PA4)
Receive data
RXD1 (PA3)
Input/Output
Input
Input
Input
Input
Output
Input
Function
Reset
Hardware protection when
programming flash memory
Sets operating mode of this LSI
Sets operating mode of this LSI
Serial transmit data output (used in
boot mode)
Serial receive data input (used in boot
mode)
20.4 Register Descriptions
20.4.1 Registers
The registers/parameters which control flash memory when the on-chip flash memory is valid are
shown in table 20.4.
There are several operating modes for accessing flash memory, for example, read mode/program
mode.
There are two memory MATs: user MAT and user boot MAT. The dedicated registers/parameters
are allocated for each operating mode and MAT selection. The correspondence of operating modes
and registers/parameters for use is shown in table 20.5.
Rev. 3.00 Oct. 06, 2008 Page 808 of 1080
REJ09B0230-0300