SH7265 Datasheet, PDF (460/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 11 Direct Memory Access Controller (DMAC)
11.3.27 DMA Reload Two-Dimensional Addressing Next Line Offset Register
(DMR2DNLOSTm)
DMR2DNLOSTm is a register used to set the offset to be reloaded to the DMA two-dimensional
addressing next line offset register (DM2DNLOSTm). To enable the reload function, set the two-
dimensional reload function enable bit (2DRLOD) of DMA control register A (DMCNTAm) to 1.
When enabled, it is necessary to set both the DMA two-dimensional addressing next line offset
register (DM2DNLOSTm) and DMA reload two-dimensional addressing next line offset register
(DMR2DNLOSTm).
Bit: 31
Initial value: -
R/W: R/W
30
-
R/W
29
-
R/W
28
-
R/W
27
-
R/W
26
-
R/W
25 24 23 22
DRNLOST[31:16]
-
-
-
-
R/W R/W R/W R/W
21
-
R/W
20
-
R/W
19
-
R/W
18
-
R/W
17
-
R/W
16
-
R/W
Bit: 15
Initial value: -
R/W: R/W
14
-
R/W
13
-
R/W
12
-
R/W
11
-
R/W
10
-
R/W
9
8
7
6
DRNLOST[15:0]
-
-
-
-
R/W R/W R/W R/W
5
-
R/W
4
-
R/W
3
-
R/W
2
-
R/W
1
-
R/W
0
-
R/W
Initial
Bit
Bit Name Value
R/W Description
31 to 0
DRNLOST Undefined
[31:0]
R/W DMA Next Line Offset Byte Count for Reloading
These bits are used to set the number of offset bytes to be
reloaded to the DMA two-dimensional addressing next line
offset register. Set these bits by using a complement of 2.
Rev. 1.00 Mar. 14, 2008 Page 424 of 1984
REJ09B0351-0100