SH7265 Datasheet, PDF (1457/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 28 2D Graphics Engine (2DG)
Bit
13
12
11 to 9
8
7
6
Initial
Bit name Value
R/W
DIS_UDFL 0
W
DIS_FILD 0
W

Undefined R
DIS_DEMPT 0
W

Undefined R
DIS_ASHFUL 0
W
Description
Output Block Output Underflow Interrupt Cancellation
This bit cancels an output underflow interrupt for the
output block.
0: Retains the current status.
1: Cancels an output underflow interrupt for the
output block.
Output Block Last Line Capture Completion Interrupt
Cancellation
This bit cancels a last line capture completion
interrupt for the output block.
0: Retains the current status.
1: Cancels a last line capture completion interrupt for
the output block
Reserved
The read value is undefined. The write value should
always be 0.
Output Block Input Buffer E Full Interrupt
Cancellation
This bit cancels an input buffer E full interrupt for the
output block.
0: Retains the current status.
1: Cancels an input buffer E full interrupt for the
output block.
Reserved
The read value is undefined. The write value should
always be 0.
Blitter Input Buffer A Full Interrupt Cancellation
This bit cancels an input buffer A full interrupt for the
blitter.
0: Retains the current status.
1: Cancels an input buffer A full interrupt for the
blitter.
Rev. 1.00 Mar. 14, 2008 Page 1421 of 1984
REJ09B0351-0100