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SH7265 Datasheet, PDF (44/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series | |||
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Section 1 Overview
Items
Specification
Synchronous serial
communication unit
(SSU)
⢠Master mode and slave mode selectable
⢠Standard mode and bidirectional mode selectable
⢠Transmit/receive data length can be selected from 8, 16, and 32 bits.
⢠Simultaneous transmission and reception (full-duplex communication)
⢠Consecutive serial communication
I2C bus interface 3
(IIC3)
⢠Two channels
⢠Four channels
⢠Master mode and slave mode supported
Serial sound interface ⢠Bidirectional serial transfer on six channels
with FIFO (SSIF)
⢠Support of various serial audio formats
⢠Support of master and slave functions
⢠Programmable generation of word clock and bit clock
⢠Multi-channel formats
⢠Support of 8, 16, 18, 20, 22, 24, and 32-bit data formats
⢠8-stage FIFO for transmission and reception
Controller area
⢠Two channels
network (RCAN-TL1) ⢠TTCAN level 1 supported on both channels
⢠BOSCH 2.0B active compatible
⢠31 transmit/receive mailboxes and one receive-only mailbox
⢠Multiple RCAN-TL1 channels can be assigned to one bus to increase
number of buffers with a granularity of 32 channels
Rev. 1.00 Mar. 14, 2008 Page 8 of 1984
REJ09B0351-0100
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