SH7265 Datasheet, PDF (1474/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 28 2D Graphics Engine (2DG)
Initial
Bit
Bit name Value
R/W Description
2
A1_V
1
R/W Vertical α Resizing Method
This bit selects α resizing method in the vertical
direction.
0: Bilinear method
1: Nearest-neighbor method
1

Undefined R
Reserved
The read value is undefined. The write value should
always be 0.
0
V1_MTHD 0
R/W Vertical Resizing Method
This bit selects a resizing method in the vertical
direction.
0: Bilinear method
1: Nearest-neighbor method
Note: The bits in GR_RISZMOD must be set when resizing is performed. These bits need not to
be set when resizing is not performed.
28.3.15 Resize Delta Setting Register for Blitter (GR_DELT)
The register GR_DELT sets delta computation results for resizing on the blitter.
Bit: 31
-
Initial value: -
R/W: R
Bit: 15
-
Initial value: -
R/W: R
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
VDLT_INTGR
VDLT_DCML
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
- HDLT_INTGR
HDLT_DCML
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
31, 30
Bit name

Initial
Value
R/W
Undefined R
Description
Reserved
The read value is undefined. The write value should
always be 0.
Rev. 1.00 Mar. 14, 2008 Page 1438 of 1984
REJ09B0351-0100