SH7265 Datasheet, PDF (1429/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 27 AT Attachment Packet Interface (ATAPI)
27.4.4 Multiword DMA Transfer Mode Operation Procedure
(1) Transfer to and from memory via enhanced bus by polling
Start
Master drive?
No
Yes
Write 1 to M/S bit
in ATAPI control register
Process (a)
Write 0 to M/S bit
in ATAPI control register
Start ATAPI device
Note: Refer to the respective manuals for each device.
Write unified memory address
to DMA start address register
Write number of transfers
to DMA transfer count register
Write following values to bits 7 to 0
in ATAPI control register:
0m100101 for ATAPI device read
0m100001 for ATAPI device write
Note: Set m to the same value as the M/S bit.
ACT = 1?
Yes
Yes
No
ERR = 0 and NEND = 1?
No
Process (b)
Clear ATAPI status register
Clear ATAPI status register
Error processing
End
Figure 27.6 Transfer to and from Memory via Enhanced Bus by Polling
Rev. 1.00 Mar. 14, 2008 Page 1393 of 1984
REJ09B0351-0100