SH7265 Datasheet, PDF (1349/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 USB 2.0 Host/Function Module (USB)
Notes: When the function controller function is selected, clear the CSCLR bit to 0. And when the
host controller function is selected, clear the ATREPM bit to 0.
1. Only 0 can be read.
2. Only 1 can be written to.
3. Modify ATREPM, SZCLR, and SQSET bits while CSSTS is 0 and PID is NAK. Modify
the ACLRM bit while CSSTS is 0, PID is NAK, and before the CURPIPE bit is selected.
Before modifying these bits after modifying the PID bits for the selected pipe from BUF
to NAK, make sure that CSSTS = 0 and PBUSY = 0. However, if the PID bits have
been modified to NAK by this module, checking of PBUSY is not necessary.
Table 25.13 Meaning of BSTS Bit
DIR Bit
0
1
BFRE Bit
0
1
0
1
DCLRM Bit Meaning of BSTS Bit
0
1: The received data can be read from the FIFO buffer.
0: The received data has been completely read from the
FIFO buffer.
1
Setting prohibited
0
1: The received data can be read from the FIFO buffer.
0: The received data has been completely read from the
FIFO buffer before setting BCLR to 1.
1
1: The received data can be read from the FIFO buffer.
0: The received data has been completely read from the
FIFO buffer.
0
1: The transmit data can be written to the FIFO buffer.
0: The transmit data has been completely written to the
FIFO buffer.
1
Setting prohibited
0
Setting prohibited
1
Setting prohibited
Rev. 1.00 Mar. 14, 2008 Page 1313 of 1984
REJ09B0351-0100