SH7265 Datasheet, PDF (418/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 11 Direct Memory Access Controller (DMAC)
11.3.4 _{DMA Reload Source Address Register (DMRSADRn)}
DMRSADRn is a register used to set an address to be reloaded to the DMA current source address
register (DMCSADRn).
To enable the reload function, set the DMA source address reload function enable bit (SRLOD) in
DMA control register A (DMCNTAn) to 1. In this case, set both the DMA current source address
register (DMCSADRn) and DMA reload source address register (DMRSADRn).
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSA[31:16]
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
RSA[15:0]
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
31 to 0
Initial
Bit Name Value
R/W
RSA[31:0] Undefined R/W
Description
Holds reload source address bits A31 to A0.
Note:
Set this register so that DMA transfer is performed for the following selected transfer data
sizes within the correctly arranged address boundaries:
• When the transfer data size is set to 16 bits (SZSEL = 001): (bit 0) = 0
• When the transfer data size is set to 32 bits (SZSEL = 010): (bit 1, bit 0) = (0, 0)
Rev. 1.00 Mar. 14, 2008 Page 382 of 1984
REJ09B0351-0100