SH7265 Datasheet, PDF (255/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 7 Interrupt Controller (INTC)
3 Icyc + m1 + m2
2 Icyc + 3 Bcyc + 1 Pcyc
3 Icyc
m1 m2 m3
IRQ
Instruction (instruction replacing
interrupt exception handling)
Overrun fetch
F D E EMMME
(1) IVO, PR, GBR, MACL
(2) R12, R13, R14, MACH
(3) R8, R9, R10, R11
Saved to bank
F
(4) R4, R5, R6, R7
(5) R0, R1, R2, R3
First instruction in interrupt
service routine
FDE
[Legend]
m1: Vector address read
m2: Saving of SR (stack)
m3: Saving of PC (stack)
Figure 7.12 Bank Save Timing
(2) Restoration from Bank
The RESBANK (restore from register bank) instruction is used to restore data saved in a register
bank. After restoring data from the register banks with the RESBANK instruction at the end of the
interrupt service routine, execute the RTE instruction to return from the exception handling.
Rev. 1.00 Mar. 14, 2008 Page 219 of 1984
REJ09B0351-0100