SH7265 Datasheet, PDF (27/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

24.4.5 Sector Access Mode........................................................................................ 1180
24.4.6 ECC Error Correction ..................................................................................... 1182
24.4.7 Status Read ..................................................................................................... 1187
24.5 Interrupt Sources............................................................................................................. 1189
24.6 DMA Transfer Specifications ......................................................................................... 1190
24.7 Usage Notes .................................................................................................................... 1191
24.7.1 Writing to the Control-Code Area when 4-Symbol ECC Circuit is in Use..... 1191
Section 25 USB 2.0 Host/Function Module (USB) .........................................1193
25.1 Features........................................................................................................................... 1193
25.2 Input/Output Pins............................................................................................................ 1196
25.3 Register Description ....................................................................................................... 1198
25.3.1 System Configuration Control Register 0 (SYSCFG0) .................................. 1202
25.3.2 System Configuration Control Register 1 (SYSCFG1) .................................. 1206
25.3.3 System Configuration Status Register 0 (SYSSTS0)...................................... 1208
25.3.4 System Configuration Status Register 1 (SYSSTS1)...................................... 1209
25.3.5 Device State Control Register 0 (DVSTCTR0) .............................................. 1211
25.3.6 Device State Control Register 1 (DVSTCTR1) .............................................. 1216
25.3.7 Test Mode Register (TESTMODE) ................................................................ 1220
25.3.8 DMA-FIFO Bus Configuration Registers (D0FBCFG, D1FBCFG) .............. 1223
25.3.9 FIFO Port Registers (CFIFO, D0FIFO, D1FIFO)........................................... 1224
25.3.10 FIFO Port Select Registers (CFIFOSEL, D0FIFOSEL, D1FIFOSEL)........... 1226
25.3.11 FIFO Port Control Registers (CFIFOCTR, D0FIFOCTR, D1FIFOCTR) ...... 1234
25.3.12 Interrupt Enable Register 0 (INTENB0) ......................................................... 1237
25.3.13 Interrupt Enable Register 1 (INTENB1) ......................................................... 1239
25.3.14 Interrupt Enable Register 2 (INTENB2) ......................................................... 1241
25.3.15 BRDY Interrupt Enable Register (BRDYENB) ............................................. 1243
25.3.16 NRDY Interrupt Enable Register (NRDYENB) ............................................. 1245
25.3.17 BEMP Interrupt Enable Register (BEMPENB) .............................................. 1247
25.3.18 SOF Output Configuration Register (SOFCFG)............................................. 1249
25.3.19 Interrupt Status Register 0 (INTSTS0) ........................................................... 1250
25.3.20 Interrupt Status Register 1 (INTSTS1) ........................................................... 1254
25.3.21 Interrupt Status Register 2 (INTSTS2) ........................................................... 1257
25.3.22 BRDY Interrupt Status Register (BRDYSTS) ................................................ 1260
25.3.23 NRDY Interrupt Status Register (NRDYSTS) ............................................... 1264
25.3.24 BEMP Interrupt Status Register (BEMPSTS) ................................................ 1269
25.3.25 Frame Number Register (FRMNUM)............................................................. 1271
25.3.26 µFrame Number Register (UFRMNUM) ....................................................... 1274
25.3.27 USB Address Register (USBADDR).............................................................. 1275
25.3.28 USB Request Type Register (USBREQ) ........................................................ 1276
Rev. 1.00 Mar. 14, 2008 Page xxvii of xxxvi