SH7265 Datasheet, PDF (1572/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 28 2D Graphics Engine (2DG)
Internal interrupt setting pulse
set
Internal interrupt resetting pulse
reset
SHFUL
set
DIS_SHFUL
MSK_SHFUL
reset
Internal interrupt setting pulse
set
Internal interrupt resetting pulse
reset
ASHFUL
set
DIS_ASHFUL
MSK_ASHFUL
reset
Internal interrupt setting pulse
set
Internal interrupt resetting pulse
reset
DHFUL
set
DIS_DHFUL
MSK_DHFUL
reset
Interrupt setting pulse
GR
DIS_GR
MSK_GR
set
reset
INT_SHFUL
IRQ_SHFUL
BLT
interrupts
INT_ASHFUL
IRQ_ASHFUL
INT_DHFUL
IRQ_DHFUL
Internal interrupt setting pulse
set
Internal interrupt resetting pulse
reset
DEMPT
set
DIS_DEMPT
MSK_DEMPT
Interrupt setting pulse
FILD
DIS_FILD
MSK_FILD
Interrupt setting pulse
VSYC
DIS_VSYC
MSK_VSYC
reset
set
reset
set
reset
Interrupt setting pulse
UDFL
DIS_UDFL
MSK_UDFL
set
reset
INT_DEMPT
Output-block-related
interrupts
INT_FILD
INT_VSYC
INT_UDFL
INT_GR
The interrupts are classified into the following two groups
in terms of the clearing method.
(1) SHFUL/ASHFUL/DHFUL/DEMPT
INT_* is cleared by the internal interrupt resetting pulse.
(2) GR/FILD/VSYC/UDFL
INT_* is cleared by DIS_*.
Figure 28.56 Structure of Interrupts
Rev. 1.00 Mar. 14, 2008 Page 1536 of 1984
REJ09B0351-0100