SH7265 Datasheet, PDF (1990/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 36 Electrical Characteristics
36.4.18 SDHI Timing
Table 36.33 SDHI Timing
Conditions: VCC = PLLVCC = 1.1 to 1.3 V, USBDVCC = 1.1 to 1.3 V, USBAVCC = 1.1 to 1.3 V,
PVCC = 3.0 to 3.6 V, AVCC = 3.0 to 3.6 V, USBAPVCC = 3.0 to 3.6 V,
2DGAPVCC0 = 3.0 to 3.6 V, 2DGAPVCC1 = 3.0 to 3.6 V,
VSS = PLLVSS = USBAVSS = AVSS = USBAPVSS = 2DGAPVSS0 = 2DGAPVSS1 = 0 V,
Ta = −40 to 85 °C
Item
Symbol Min.
Max.
SD_CLK clock cycle
tSDPP
2 × tpcyc 
SD_CLK clock high width
tSDWH
0.4 × tSDPP 
SD_CLK clock low width
tSDWL
0.4 × tSDPP 
SD_CMD, SD_D3 to SD_D0 output data delay
tSDODLY

14
(data transfer mode)
SD_CMD, SD_D3 to SD_D0 input data setup
tSDISU
5

SD_CMD, SD_D3 to SD_D0 input data hold
tSDIH
5

Note:
t
pcyc
indicates
the
period
of
one
cycle
of
the
peripheral
clock
(Pφ).
Unit Figure
ns Figure
ns ^36.87
ns
ns
ns
ns
t_SDPP
t_SDWL
t_SDWH
SD_CLK
SD_CMD, SD_D3 to SD_D0 input
t_SDISU t_SDIH
SD_CMD, SD_D3 to SD_D0 output
t_SDODLY (max)
t_SDODLY (min)
Figure 36.87 SD Card Interface
Rev. 1.00 Mar. 14, 2008 Page 1954 of 1984
REJ09B0351-0100