SH7265 Datasheet, PDF (2019/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

USBVAL .......................................... 1277
VDAC_TMC .................................... 1458
WRCSR .............................................. 691
WTCNT .............................................. 688
WTCSR .............................................. 689
Reload function....................................... 453
Reset sequence...................................... 1005
Reset state ................................................. 91
Reset-synchronized PWM mode ............ 562
Restoration from bank ............................ 219
Restoration from stack............................ 220
Restriction on DMAC usage................... 798
RISC-type instruction set.......................... 54
Roles of mailboxes ................................. 938
Rotate function ....................................... 455
Rounding ................................................ 103
RTC crystal oscillator circuit.................. 729
S
Saving to bank ........................................ 218
Saving to stack........................................ 220
Scan mode ............................................ 1117
SCIF interrupt sources ............................ 796
SCIF timing .......................................... 1902
SD host interface (SDHI)...................... 1369
SDHI timing ......................................... 1954
Searching cache ...................................... 254
Sector access mode ............................... 1180
Sending a break signal ............................ 798
Serial bit clock control............................ 927
Serial communication interface with
FIFO (SCIF) ........................................... 731
Serial sound interface with FIFO
(SSIF) ..................................................... 885
Setting analog input voltage ....... 1125, 1135
Setting I/O ports for RCAN-TL1.......... 1031
Shift instructions....................................... 81
Sign extension of word data ..................... 54
Single mode .......................................... 1112
Single-processor active state..................... 91
Slave receive operation ........................... 870
Slave transmit operation.......................... 867
Sleep errors ............................................. 150
Sleep mode............................................ 1006
Slot illegal instructions ........................... 154
SOF interpolation function.................... 1367
SSIF timing ........................................... 1909
SSU interrupt sources ............................. 840
SSU mode ............................................... 823
SSU timing............................................ 1904
Stack status after exception
handling ends .......................................... 158
Stack status after interrupt exception
handling .................................................. 210
Standby control circuit............................ 117
Status register (SR) ................................... 48
Synchronous serial communication unit
(SSU) ...................................................... 801
System control instructions....................... 83
System matrix ......................................... 952
T
T bit........................................................... 55
TAP controller ...................................... 1701
TDO output timing................................ 1702
Test mode settings................................. 1003
(Potential) time master .......................... 1016
Time slave............................................. 1017
Time trigger control (TT control) ........... 948
Time triggered transmission.................. 1012
Timestamp .............................................. 947
Timing to clear an interrupt source ......... 222
Transfer clock ......................................... 818
Transfer rate............................................ 849
Trap instruction....................................... 154
TTW[1:0] (time trigger window) ............ 949
Tx-trigger control field ........................... 949
Tx-trigger time (TTT) ............................. 948
Rev. 1.00 Mar. 14, 2008 Page 1983 of 1984
REJ09B0351-0100