SH7265 Datasheet, PDF (1687/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 33 Power-Down Modes
33.2.3 Standby Control Register 3 (STBCR3)
STBCR3 is an 8-bit readable/writable register that controls the operation of modules in power-
down modes.
Note: When writing to this register, see section 33.4, Usage Notes.
Bit: 7
MSTP
37
Initial value: 1
R/W: R/W
6
MSTP
36
1
R/W
5
MSTP
35
1
R/W
4
MSTP
34
1
R/W
3
MSTP
33
1
R/W
2
MSTP
32
1
R/W
1
MSTP
31
1
R/W
0
MSTP
30
0
R/W
Initial
Bit Bit Name Value R/W Description
7
MSTP37 1
R/W Module Stop 37
When set to 1, the clock supply to the ATAPI is halted.
0: ATAPI runs.
1: Clock supply to ATAPI is halted.
6
MSTP36 1
R/W Module Stop 36
When set to 1, the clock supply to the IEB is halted.
0: IEB runs.
1: Clock supply to IEB is halted.
5
MSTP35 1
R/W Module Stop 35
When set to 1, the clock supply to the MTU2 is halted.
0: MTU2 runs.
1: Clock supply to MTU2 is halted.
4
MSTP34 1
R/W Module Stop 34
When set to 1, the clock supply to the SDHI0 is halted.
0: SDHI0 runs.
1: Clock supply to SDHI0 is halted.
3
MSTP33 1
R/W Module Stop 33
When set to 1, the clock supply to the SDHI1 is halted.
0: SDHI1 runs.
1: Clock supply to SDHI1 is halted.
Rev. 1.00 Mar. 14, 2008 Page 1651 of 1984
REJ09B0351-0100