SH7265 Datasheet, PDF (1205/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 24 AND/NAND Flash Memory Controller (FLCTL)
24.3.15 4-Symbol ECC Control Register (FL4ECCCR)
FL4ECCCR is a 32-bit readable register that indicates the processing states of the 4-symbol ECC
circuit. This register consists of flag bits to which only 0 can be written. To clear a flag, write 0 to
the target flag bit and 1 to the other flag bits.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
4ECC 4ECC 4ECC
FA END EXST
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R R/(W)* R/(W)* R/(W)*
Bit
Bit Name
31 to 3 —
Initial
Value
All 0
2
4ECCFA 0
1
4ECCEND 0
R/W Description
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/(W)* 4-Symbol ECC Uncorrectable Error
Only 0 can be written to this bit.
If five or more errors have been detected, it is regarded
that the errors are uncorrectable and this bit is set to 1.
0: Indicates that the error is correctable.
1: Indicates that the error is uncorrectable
R/(W)* 4-Symbol ECC Error Counting/Correction Pattern
Generation End
Only 0 can be written to this bit.
When set, it indicates that counting of errors or
generation of correction pattern has ended. If both of bits
4ECCFA and 4ECCEND are set to 1, it indicates that five
or more errors were detected and the processing has
therefore ended without generating a correction pattern.
Rev. 1.00 Mar. 14, 2008 Page 1169 of 1984
REJ09B0351-0100