SH7265 Datasheet, PDF (1248/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name
Value R/W Description
7
RWUPE
0
R/W Remote Wakeup Detection Enable
Enables or disables the function device connected to
PORT0 to use the remote wakeup function (resume
signal output) when the host controller function is
selected.
With this bit set to 1, on detecting the remote wakeup
signal (K-state for 2.5 µs) from the function device
connected to PORT0, this module outputs the
resume signal (drives the port to the K-state) and
sets the RESUME bit to 1 at the same time.
With this bit set to 0, this module ignores the
detected remote wakeup signal (K-state) from the
function device connected to PORT0.
0: Downstream port wakeup is disabled.
1: Downstream port wakeup is enabled.
While this bit is 1, the USB clock should not be
stopped even in the suspended state (SCKE should
be set to 1). Also note that the USB bus should not
be reset from the suspended state (USBRST should
not be set to 1); it is prohibited by USB Specification
2.0.
6
USBRST
0
R/W PORT0 USB Bus Reset Output
When the host controller function is selected, setting
this bit to 1 causes this module to drive PORT0 to
SE0 to reset the USB bus. Here, this module
performs the reset handshake protocol if the HSE bit
for PORT0 is 1.
This module continues outputting SE0 while
USBRST is 1. Ensure that USBRST stays 1 (= USB
bus reset period) for the time defined by USB
Specification 2.0.
0: USB bus reset signal is not output.
1: USB bus reset signal is output.
Note: Writing 1 to this bit during communication
(UACT = 1) or during the resume process
(RESUME = 1) prevents this module from
starting the USB bus reset process until both
UACT and RESUME become 0.
When the USB bus reset processing has
ended, write 0 to this bit and 1 to the UACT bit
at the same time.
Rev. 1.00 Mar. 14, 2008 Page 1212 of 1984
REJ09B0351-0100