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SH7265 Datasheet, PDF (1945/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Section 36 Electrical Characteristics
36.4.11 SSIF Timing
Table 36.16 SSIF Timing
Conditions: VCC = PLLVCC = 1.1 to 1.3 V, USBDVCC = 1.1 to 1.3 V, USBAVCC = 1.1 to 1.3 V,
PVCC = 3.0 to 3.6 V, AVCC = 3.0 to 3.6 V, USBAPVCC = 3.0 to 3.6 V,
2DGAPVCC0 = 3.0 to 3.6 V, 2DGAPVCC1 = 3.0 to 3.6 V,
VSS = PLLVSS = USBAVSS = AVSS = USBAPVSS = 2DGAPVSS0 = 2DGAPVSS1 = 0 V,
Ta = −40 to 85 °C
Item
Output clock cycle
Input clock cycle
Clock high
Clock low
Clock rise time
Delay
Symbol
tO
tI
tHC
tLC
tRC
tDTR
Min.
80
80
32
32

−5
Setup time
tSR
25
Hold time
tHTR
5
AUDIO_CLK input frequency fAUDIO
1
Max. Unit
64000 ns
64000 ns

ns

ns
25
ns
25
ns

ns

ns
40
MHz
Remarks
Output
Input
Bidirectional
Output
Transmit
Receive
Receive,
transmit
Figure
Figure
36.36
Figures
36.37,
36.38
Figures
36.39,
36.40
Figures
36.37 to
36.40
Figure
36.41
SSISCKn
tHC
tRC
tLC
tI ,tO
Figure 36.36 Clock Input/Output Timing
Rev. 1.00 Mar. 14, 2008 Page 1909 of 1984
REJ09B0351-0100