SH7265 Datasheet, PDF (1135/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 IEBus^TM Controller (IEB)
21.7 Interrupt Sources
IEB interrupt sources include the following:
• Transmit start (TXS)
• Transmit normal completion (TXF)
• Arbitration loss (TXEAL)
• Transmit timing error (TXETTME)
• Overflow of the maximum number of transmit bytes in one frame (TXERO)
• Acknowledge bits (TXEACK)
• Receive busy (RXBSY)
• Receive start (RXS)
• Receive normal completion (RXF)
• Broadcast Receive Error (RXEDE)
• Receive overrun flag (RXEOVE)
• Receive timing error (RXERTME)
• Overflow of the maximum number of receive bytes in one frame (RXEDLE)
• Parity error (RXEPE)
Each source has bits corresponding to the IEBus transmit interrupt enable register (IEIET) and the
IEBus receive interrupt enable register (IEIER) and can enable/disable interrupts. Each source also
has status flags corresponding to the IEBus transmit status register (IETSR) and IEBus receive
status register (IERSR). Reading the status flags allows determination of the interrupt sources.
Rev. 1.00 Mar. 14, 2008 Page 1099 of 1984
REJ09B0351-0100