SH7265 Datasheet, PDF (394/2024 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 10 Bus State Controller (BSC)
This LSI
A18 to A2
A1, A0
CSn
RD
RD_WR/WE
D31 to D16
WE3/BC3/DQM3
WE2/BC2/DQM2
D15 to D0
WE1/BC1/DQM1
WE0/BC0/DQM0
Not in use
1M SRAM
(64K × 16 bits)
A15 to A0
CS
OE
WE
IO15 to IO0
UB
LB
A15 to A0
CS
OE
WE
IO15 to IO0
UB
LB
Figure 10.44 Example of Connecting a 32-Bit Data-Width SRAM (with Byte Control)
This LSI
A17 to A1
A0
CSn
RD
RD_WR/WE
D31 to D16
WE3/BC3/DQM3
WE2/BC2/DQM2
D15 to D0
WE1/BC1/DQM1
WE0/BC0/DQM0
Not in use
Not in use
Not in use
Not in use
1M SRAM
(64K × 16 bits)
A15 to A0
CS
OE
WE
IO15 to IO0
UB
LB
Figure 10.45 Example of Connecting a 16-Bit Data-Width SRAM (with Byte Control)
Rev. 1.00 Mar. 14, 2008 Page 358 of 1984
REJ09B0351-0100